The present invention relates to anti-fuses, and more particularly to circuitry and methods for switching current flow through the anti-fuse off after the anti-fuse has blown.
Anti-fuses are semiconductor devices which comprise a thin dielectric layer between two conductors. The unblown anti-fuse is initially an xe2x80x9copenxe2x80x9d circuit between the two conductors. However, if a sufficiently high voltage pulse is applied across the two conductors to rupture the dielectric, a closed circuit is formed between the two conductors and the anti-fuse is considered to be xe2x80x9cblown.xe2x80x9d U.S. Pat. No. 4,943,538 to Amr M. Mohsen, et al. discloses this type of anti-fuse.
Another form of anti-fuse consists of a region of amorphous material of high resistance sandwiched between two conductors. This type of anti-fuse is xe2x80x9cblownxe2x80x9d when a sufficient current is passed through the amorphous material so that the high resitivity of the amorphous material changes state and becomes a conductive material. U.S. Pat. No. 4,752,118 to Robert R. Johnson describes this type of anti-fuse. Both types of anti-fuses may be used with the present invention.
There are several devices, such as various memory chips and gate arrays, etc., which can be programmed and even reprogrammed by the use of parallel anti-fuses. Unfortunately, the low power capabilities of on-chip power supplies together with line conductor resistance of prior art anti-fuse circuitry often limits the voltage and/or current at the anti-fuse elements. These limitations can affect the blowing capacities of parallel anti-fuses, and can also prevent the usage of a xe2x80x9ctest time efficientxe2x80x9d parallel fuse blow.
Referring now to FIG. 1, there is shown prior art anti-fuse circuitry having a multiplicity of parallel anti-fuse circuits. As shown, there is a power supply or source 10 having a first output 12, which may for example be a positive output and a second output 14 which may be a negative output connected to conductive paths or electric conductors 16 and 18 respectively. Also shown are resistive units or elements 20 and 22 that represent the electrical line resistance between the power supply or source 10 and the multiplicity of anti-fuse circuits 24, 26, 28 and xe2x80x9cNxe2x80x9d. The resistance units 20 and 22 could include actual resistors intentionally connected in the circuitry, but are primarily intended to represent the power supply connectors or terminals 12 and 14, as well as the line or conductor resistance. Also as shown, each of the multiplicity of anti-fuse circuits are comprised of an anti fuse 30 having connection points or terminals 32 and 34 connected in series with a switching device or transistor 36 which also has a pair of connection points or terminals for conducting a current therethrough when xe2x80x9cclosedxe2x80x9d by an xe2x80x9conxe2x80x9d or xe2x80x9cactivatexe2x80x9d signal provided to a control terminal or gate. The switching device or transistor 36 represents an xe2x80x9copenxe2x80x9d circuit or high impedance when the xe2x80x9cactivatexe2x80x9d or xe2x80x9conxe2x80x9d signal is not present. Typically, switching device or transistor 36 will be a xe2x80x9cblow transistorxe2x80x9d such as an FET (field effect transistors) having a control terminal or gate 38 and source/drain terminals as indicated for example by terminals 40 and 42.
As is understood by those skilled in the art, and referring again to FIG. 1, when an anti-fuse is in an xe2x80x9cunblownxe2x80x9d state, a high resistance or impedance exists between the anti-fuse terminals 32 and 34. And when the anti-fuse is xe2x80x9cblown,xe2x80x9d it provides an electrical conductor or low resistance path between terminals 32 and 34. If two or more of the parallel anti-fuses are selected to be xe2x80x9cblown,xe2x80x9d an xe2x80x9cactivatexe2x80x9d or xe2x80x9conxe2x80x9d signal will be applied to gate 38 of each of the appropriate blow transistors which are in series with the anti-fuse to be blown. As can be seen from the prior art FIG. 1, all of the parallel anti-fuses initially see or are across approximately the same voltage potential. However, once an anti-fuse blows, a significant current flows through the blown fuse 30 and its corresponding blow transistor 36. As a result, there is a voltage drop that occurs across the line or conductor resistance and the power supply connect terminals 12 and 14 represented by resistance units 20 and 22. Consequently, the remaining parallel fuses are not exposed to the full voltage provided by the power source 10. Then, if another fuse blows, the current drawn from power source 10 increases and the voltage across the remaining anti-fuses drops even further. This process, of course, continues as each of the remaining unblown anti-fuses blow until the cumulative voltage drop is so great that the remaining unblown fuses will not blow. This means, of course, that by turning on or activating more than one blow transistor at a time, it is difficult if not impossible to predict and adjust the blow voltage across each fuse element. This of course is unacceptable for those situations where the ability to predict and adjust the necessary voltage to blow the anti-fuses is essential for highly reliable blowing procedures.
In addition, in the prior art anti-fuse circuitry, once an anti-fuse xe2x80x9cblowsxe2x80x9d, the current will continue through the anti-fuse 30 and the blow transistor for quite some time. Such a high continuous current often resulted in the anti-fuse circuitry being damaged. For example, the gate oxide of the anti-fuse blow transistor may be destroyed if the current flows for an extended time such as for example one millisecond. When this occurs, a blown anti-fuse might be read as being unblown since the blow transistor can no longer operate properly. Therefore, it would be advantageous if each parallel anti-fuse in a circuit is exposed to the same voltage potential.
It would also be advantageous to reduce the time period that the anti-fuses and the supply conductors or lines for the anti-fuse are exposed to a high amount of current so as to prevent damage to the anti-fuse, supply conductors and associated circuitry.
The above advantages are achieved in the present invention by methods and anti-fuse circuitry connected to a voltage source used to blow the anti-fuse. At least one anti-fuse has one of its two connection points or terminals electrically coupled to an output of the voltage source. The second output of the anti-fuse being coupled to one of the input/output terminals of a switching device such as, for example, to one of the source/drain terminals of an FET transistor. The second input/output (source/drain) of the switching device is coupled to the other output of the voltage source. The control terminal of the switching device or according to one embodiment, the gate of the FET transistor, receives a control signal which closes the path between the two input and output (source/drain) terminals, or in an embodiment using an FET transistor turns the transistor on to allow a current flow therethrough. Also included in the present invention is a control circuit having a first input connected to a junction, point or node between the anti-fuse and the switching device. A second input of the control circuit receives a signal indicating or selecting the associated or particular anti-fuse to be blown. The control circuit also has an output that is coupled to the control terminal or gate of the switching device so as to turn the FET transistor or other type of switching device on and provide a low conductive path through the switching device or transistor. The control circuitry operates such that in its normal operation mode, the control signal is provided to the switching device or transistor only when the associated anti-fuse has not blown and the signal selecting the particular anti-fuse is present. Consequently, once the fuse is blown, the control signal to the switching device is removed. Thus, the switching device or FET transistor sees a high impedance between its terminals such that the current flow through the anti-fuse ceases. Thus, by turning off the switching device and thereby stopping the current flow, damage to the conductive lines and the oxide of the circuit is prevented while at the same time each of the other or remaining parallel anti-fuses will see the original initial voltage which resulted in the first fuse being blown.
Also disclosed is an anti-fuse system which is comprised of a multiplicity of parallel anti-fuse circuits of the type discussed above. Accordingly, there is included first and second conductors coupled one each to the two outputs of the power or voltage source. The multiplicity of anti-fuse circuits are connected in parallel between the first and second conductors. Each selected anti-fuse will be connected to substantially the same xe2x80x9cblowxe2x80x9d voltage no matter how many parallel anti-fuses are blown since once an anti-fuse is blown its associated blow transistor is turned off thereby interrupting the current flow through the blown anti-fuse.